Position: Digital IC Designer
Responsibilities:
1. Write module architecture and microarchitecture document
2. Responsible for the microarchitecture, design and development of modules and IP cores
3. Implement RTL code design with Verilog
4. Write timing constraints, perform synthesis and timing analysis
5. Verify the design, debug, and assist in the development of the FPGA platform.
6. Develop functional models to help verify architectural feasibility
Job Requirements
1. Master degree or above in microelectronics, computer, electronic engineering, communications and other related majors, ASIC design and verification related work experience, HDD/SSD storage design and verification related experience is preferred
2. Familiar with ASIC design process, including RTL design, verification, synthesis, timing, ECO, bringup and lab debug, etc.
3. Familiar with multi-clock domain, CDC processing and asynchronous interface processing, etc.
4. Experienced in Verilog, familiar with Systemverilog, C/C++ and other languages
5. Familiar with at least one scripting language, Perl/Python/shell/Makefile, etc.
6. Familiar with PCIe, NVMe, DDR, ECC, NAND and other protocols are preferred
7. Experience in large module architecture and microarchitecture design and implementation is preferred
